Any substantive contribution to your solution by another person or taken from a publication should be properly acknowledged in writing. Failure to do so is plagiarism and will necessitate disciplinary action.
The same standards regarding plagiarism apply to team projects as to the work of individuals, except that the author is now the entire team rather than an individual. Anything taken from a source outside the team should be be properly cited.
One additional issue that arises from the team authorship of project reports is that all team members must stand behind all reports bearing their names. All team members have quality assurance responsibility for the entire project. If there is irreconcilable disagreement within the team it is necessary to indicate as much in the reports; this can be in the form of a ``minority opinion'' or ``dissenting opinion'' section where appropriate.
If you are too sick to complete an assignment on time, you will not be penalized. Simply write ``late due to illness'' at the top of the assignment, sign your name and hand it in. Other circumstances will be evaluated on a case-by-case basis.
This is my best guess as to the rate at which we will cover material. However, don't be shocked if I have to pass out one or more revised syllabi.
Date | Reading | Topic | Due |
---|---|---|---|
9/9 | Introduction | ||
9/10 | 1 | Computer abstractions and technology | |
9/11 | 2 | Performance | |
9/14 | Lab 0: Under the hood | ||
9/15 | 3.1-3.5 | Instructions | HW 1 |
9/16 | 3.6-3.7 | Procedures and strings in assembly | |
9/17 | 3.8-3.9 | More on assembly programming | |
9/18 | 3.10-3.11 | Assembly programming examples | |
9/21 | Lab 1: Elementary assembly programming | ||
9/22 | 3.12-3.15 | Yet more on assembly language | |
9/23 | 4.1-4.4 | Two's complement, addition, and subtraction | HW 2 |
9/24 | 4.5 | Arithmetic Logic Unit | |
9/25 | 4.6 | Multiplication | |
9/28 | Lab 1 (continued) | ||
9/29 | 4.7 | Division | HW 3 |
9/30 | 4.8 | Floating-point arithmetic | |
10/1 | 4.9-4.12 | More on arithmetic | |
10/2 | Lab 1 (concludes) (a Friday lab) | ||
10/5 | Review; catch-up (class instead of lab) | Lab 1 | |
10/8 | Intra-term exam 1 | ||
10/9 | B.1-B.3 | Combinational logic | |
10/12 | Lab 2: More advanced assembly programming | ||
10/13 | B.4-B.6 | Sequential logic | |
10/14 | 5.1-5.2 | A simple datapath | |
10/15 | 5.3-p. 371 | A single-cycle processor | |
10/16 | 5.3 | More on the single-cycle processor | |
10/19 | Lab 2 (continued) | ||
10/20 | 5.4 | A multiple-cycle processor | HW 4 |
10/21 | More on the multiple-cycle processor | ||
10/22 | 5.5-5.9 | Microprogramming; exceptions | |
10/27 | C.1-C.4 | Mapping control to hardware | |
10/28 | Lab 2 (continued) (a Wednesday lab) | ||
10/29 | 6.1 | Pipelining | |
10/30 | 6.2 | A pipelined datapath | HW 5 |
11/2 | Lab 2 (concludes) | ||
11/3 | 6.3 | Pipelined control | |
11/4 | 6.4 | Forwarding | Lab 2 |
11/5 | 6.5 | Stalls | |
11/6 | 6.6-6.7 | Control hazards | |
11/9 | Lab 3: Measuring processor architectures' performance | HW 6 | |
11/10 | 6.8-6.9 | Superscalar and advanced pipelining | |
11/11 | Lab 3 (continued) (a Wednesday lab) | ||
11/12 | 6.10-6.12 | More on pipelining | |
11/13 | Review; catch-up | ||
11/16 | Lab 3 (concludes) | ||
11/17 | Intra-term exam 2 | ||
11/18 | 7.1-7.2 | Caches | |
11/19 | 7.3 | Cache performance | Lab 3 |
11/20 | 7.4 | Virtual memory | |
11/23 | Lab 4: Cache simulation | ||
11/24 | 7.5 | Memory hierarchies | |
11/25 | 7.6-7.9 | Example memory hierarchies | HW 7 |
11/30 | Lab 4 (continued) | ||
12/1 | 8.1-8.3 | Input/output devices | |
12/2 | Lab 4 (concludes) (a Wednesday lab) | ||
12/3 | 8.4 | Buses | |
12/4 | 8.5-8.11 | Interfacing input/output | |
12/7 | 9.1-9.3 | Bus-based MIMD architectures (class instead of lab) | Lab 4 |
12/8 | 9.4-9.6 | Network-based MIMD architectures | |
12/9 | Lab 5: NOW parallelism demo (a Wednesday lab) | ||
12/10 | 9.7-9.10 | More on multiprocessors | |
12/11 | Review; catch-up; evaluation | HW 8 | |
12/16 | Final exam, 10:30am (tentative) |