Syllabus and general information for MC97: Compiler Design (Spring 1997)


MC97 attempts to draw together the theory and practice of compiler construction. Much of the material will have a strong theoretical foundation. However, with the exception of the last couple topics (due to time constraints), this material will serve as the basis for compiler-writing projects. Topics include lexical and syntactic analysis, naive code generation, data-flow analysis, register allocation and assignment, suppression of partial redundancies, and instruction scheduling.

Office hours

I will be available in my office (OHS 303) on Mondays from 1:30 to 2:20, on Tuesdays and Thursdays from 10:30 to 11:20, on Wednesdays from 9:00 to 9:50, and by appointment. You may send me electronic mail at or call me at extension 7466. I'll try to put any temporary updates to my office hours on my web page and any long-term updates on my on-line schedule, so check there if in doubt.

World Wide Web

All course handouts will be available through my World Wide Web page, and some supplementary materials such as code to use as a starting point in assignments may be available there as well. The URL for this course is


MC97 draws heavily on MC55, MC87, and MC48. Some notions from MC57 and MC36 also crop up. You're expected to be able to program. Since the compiler-building tools and pre-existing code modules I supply will be centered around the Java programming language, the path of least resistance will probably be to learn that language as we go if you don't already know it. On the other hand, there are comparable compiler-building tools centered around other langauges (including in particular C/C++), so if you would rather use another language, that's fine too, you'll just have a little less of a support network. In fact, I'll glady accept labs written in any programming language: Scheme, ML, Ada, you name it.

Text and readings

Our primary text will be the ``red dragon book,'' i.e., Compilers: Principles Techniques and Tools by Alfred V. Aho, Ravi Sethi, and Jeffrey D. Ullman, Addison Wesley, 1986. We will also use some additional material: documentation, some of which will be on-line or in the lab area and some of which I'll hand out, and supplementary readings, which I will hand out. (There's also an on-line Java Tutorial at, and copies of Arnold and Gosling's The Java Programming Language book and Cornell and Horstmann's Core Java book in the MCS Lab monitors' room, any of which you are welcome to use as a supplement.)


Students are encouraged to discuss the course, including issues raised by the assignments. However, the solutions to assignments should be individual original work unless otherwise specified. If an assignment makes you realize you don't understand the material, ask a fellow student a question designed to improve your understanding, not one designed to get the assignment done. To do otherwise is to cheat yourself out of understanding, as well as to be intolerably dishonorable.

Any substantive contribution to your solution by another person or taken from a publication should be properly acknowledged in writing. Failure to do so is plagiarism and will necessitate disciplinary action.

The same standards regarding plagiarism apply to team projects as to the work of individuals, except that the author is now the entire team rather than an individual. Anything taken from a source outside the team should be be properly cited.

One additional issue that arises from the team authorship of project reports is that all team members must stand behind all reports bearing their names. All team members have quality assurance responsibility for the entire project. If there is irreconcilable disagreement within the team it is necessary to indicate as much in the reports; this can be in the form of a ``minority opinion'' or ``dissenting opinion'' section where appropriate.

Late assignments

All homework and lab assignments are due at the beginning of class on the day indicated. Late assignments will be penalized by one ``grade notch'' (such as A to A- or A- to B+) for each weekday late or fraction thereof. However, no late assignments will be accepted after graded assignments are handed back.

If you are too sick to complete an assignment on time, you will not be penalized. Simply write ``late due to illness'' at the top of the assignment, sign your name and hand it in. Other circumstances will be evaluated on a case-by-case basis.

Grade changes

Please point out any arithmetic or clerical error I make in grading, and I will gladly fix it. You may also request reconsideration if I have been especially unjust.


I will provide you with a letter grade on each homework assignment and lab assignment, in addition to the mid-term and final grades, so that you may keep track of your performance. As a guideline, the homeworks will contribute approximately half of your final grade, with the labs contributing the other half. However, I reserve the right to subjectively adjust your final grade. Please see me if you have any question how you stand. Class participation is not graded; however, it allows you to find and repair the gaps in your understanding before doing the assignments, and thus can dramatically improve your grade.

Style guidelines

All homework and lab reports should be readily readable, and should not presuppose that I already know what you are trying to say. In particular: Programs should be easily read as well. Some points to remember are the following: Be sure your assignments are always stapled together and that your name is always on them.

Computer Logistics

You may use any computer facilities you want. However, my expectation is that the SGI workstations and Linux PCs in OHS 326 and OHS 329 will be the normal choice. The assignments will presume you have access to a number of software tools that are already installed on the MCS SGIs and Linux PCs. We'll be using the MIPS processor that the SGIs are based on as the target processor for your compliers. However, normally you'll be using a MIPS simulation program called SPIM rather than the real MIPS processor, and SPIM is available on the PCs and in fact on the NeXTs as well. (On the SGIs and PCs, the graphical user interface version of SPIM is called xspim while on the NeXTs it is NeXTspim.)


Please contact me immediately if you have special physical circumstances, e.g. impaired vision, which may affect the accessibility of any course components. I will do my best to facilitate necessary arrangements or resources.


In the reading column, section 0 means the material at the beginning of a chapter before the first section. When a reading is indicated as going to a particular page number, it means up to the heading on that page. The same section number on the next class day then indicates to finish the section.

This is my best guess as to the rate at which we will cover material. However, don't be shocked if I have to pass out one or more revised syllabi.
2/101.0-2.2Introduction, MIPS ISA, syntax definition
2/122.3-2.4Syntax-directed translation
2/142.5-2.6Your first compiler

2/173.0-3.1, 3.3, 3.5Lexical analysisHW 1
2/19Lexical-analyzer generators
2/214.0-4.2Context-free grammars

2/244.3Writing a grammarLab 1
2/264.4-p.188Top-down parsing

3/34.4More on predictive parsingHW 2
3/54.5, 4.7-p.220Bottom-up parsing
3/74.7-p.230SLR parser generation

3/104.7-p.240Canonical LR and LALR parser generationLab 2
3/124.8-p.251, 4.9Using ambiguous grammars; parser generators
3/145.0-5.3Syntax-directed definitions

3/175.4-5.6L-attributed definitions; bottom-up attribute evaluationHW 3
3/198.0-8.1Intermediate code
3/218.2-8.3, p.481Declarations and simple assignments (10:30-11:05)

3/248.3Array access; type conversions
3/268.4Control flow
3/27(no class, just a due date)Lab 3

4/76.0-6.4Type checking
4/97.0-7.2Run-time environments
4/117.3Storage-allocation strategies

4/14Modern run-time environment issues
4/169.0-9.3Code generation
4/189.4Basic blocks and flow graphs

4/2110.0-10.2OptimizationLab 4
4/2310.4Loops in flow graphs
4/2510.5Data-flow analysis

4/28Liveness analysisHW 4
4/30notesRegister allocation
5/2More on register allocation

5/5Yet more on register allocation
5/710.6Iterative data-flow analysisLab 5
5/9More data-flow analysisHW 5

5/12notesSuppression of partial redundancy
5/1410.11Data-flow analysis frameworks
5/16notesInstruction schedulingHW 6

5/19More on instruction scheduling
5/21Synthesis; evaluationLab 6

Course web site:
Instructor: Max Hailperin <>