When turning in a homework problem, be sure to indicate the exercise number. These will be the reference numbers I use in reporting back your standing on the homework.

Exercise

**7.5**on pages 691-692. In each of parts 1-3, estimate what the critical path would be.Exercise

**7.12**on pages 696-697. Assume the MT and SMT processors issue instructions in order within any particular thread. All three processors have two functional units per core and can issue two instructions per clock cycle in each core; MT and SMT have only one core. On the SS processor, each thread stays on a single core. Unless you explicitly state a contrary assumption, I will assume that the functional units are pipelined; that is, a functional unit can start a new instruction each cycle, even if it is still working on a prior instruction.Exercise

**7.x1**: Refer to Figure 7.14 on page 670. Give an example of an arithmetic intensity (FLOPbyte ratio) for which you would expect the Opteron X2 and Opteron X4 to provide identical performance. What is the computation rate in GFLOP/s that you would expect both to have? Is this limited (on both processors) by memory bandwidth or by computation? Now give an example of an arithmetic intensity where the two processors would have different limiting bandwidths (one memory, one computation). For each of the two processors, which bandwidth is limiting and what would you expect the computation rate to be? Finally, give a third example arithmetic intensity, this one where both processors would be limited by the same kind of bandwidth, but would have different performance. At this intensity, which kind of bandwidth is limiting for both processors? And for each processor, what would the predicted rate of computation be?

Instructor: Max Hailperin