When turning in a homework problem, be sure to indicate the exercise number. These will be the reference numbers I use in reporting back your standing on the homework.
Do exercise 8.1 on page 611, except use 400,000 instructions per I/O operation rather than only 10,000.
Do exercise 8.10 on pages 614-615.
Do exercise 8.11 on page 615.
Do exercise 8.18 on page 616. Clarification: the disks in question transfer 50 MB/sec.
Do exercise 8.34 on page 619: An important advantage of interrupts over polling is the ability of the processor to perform other tasks while waiting for communication from an I/O device. Suppose that a 1 GHz processor needs to read 1000 bytes of data from a particular I/O device. The I/O device supplies 1 byte of data every 0.02 ms. The code to process the data and store it in a buffer takes 1000 cycles.
If the processor detects that a byte of data is ready through polling, and a polling iteration takes 60 cycles, how many cycles does the entire operation take?
If instead, the processor is interrupted when a byte is ready, and the processor spends the time between interrupts on another task, how many cycles of this other task can the processor complete while the I/O communication is taking place? The overhead for handling an interrupt is 200 cycles.
Instructor: Max Hailperin